Simplify the data structure to get SD/MMC to SPI mode, and use SPI

functions instead of direct GPIO access
This commit is contained in:
Nathael Pajani 2022-11-10 12:16:39 +01:00
parent e27f5c0c97
commit 81dc97e8d9
2 changed files with 8 additions and 18 deletions

View File

@ -165,28 +165,23 @@ static int sdmmc_send_app_command(const struct sdmmc_card* mmc, uint8_t index, u
return sdmmc_send_command(mmc, index, arg, NULL, 0);
}
#define MMC_TO_SPI_BYTES 10 /* We need at least 74 bit : 10 x 8 bits is OK */
void sdmmc_set_card_to_spi_mode(const struct sdmmc_card* mmc)
{
int i = 0;
uint8_t mmcdata[MMC_TO_SPI_BYTES];
/* Get SPI Bus */
spi_get_mutex(mmc->ssp_bus_num);
/* Set SPI pins to GPIO mode */
set_pins(mmc->pin_cfg_mode_gpio);
/* Configure GPIOs */
/* Configure Chip Sslect GPIO */
config_gpio(&(mmc->chip_select), LPC_IO_MODE_PULL_UP, GPIO_DIR_OUT, 1);
config_gpio(&(mmc->sclk), LPC_IO_MODE_PULL_UP, GPIO_DIR_OUT, 1);
config_gpio(&(mmc->mosi), LPC_IO_MODE_PULL_UP, GPIO_DIR_OUT, 1);
/* Toggle SCLK to get 74 clock cycles while holding MOSI and CS high */
/* CS high */
gpio_set(mmc->chip_select);
gpio_set(mmc->mosi);
for (i = 0; i < (80 * 2); i++) {
gpio_toggle(mmc->sclk);
}
/* Set SPI pins to GPIO mode */
set_pins(mmc->pin_cfg_mode_spi);
/* Send 10 bytes of 0xFF, which makes MOSI High */
memset(mmcdata, 0xFF, MMC_TO_SPI_BYTES);
spi_transfer_multiple_frames(mmc->ssp_bus_num, mmcdata, NULL, MMC_TO_SPI_BYTES, 8);
/* Release SPI Bus */
spi_release_mutex(mmc->ssp_bus_num);

View File

@ -36,11 +36,6 @@ struct sdmmc_card {
uint16_t block_size;
uint8_t block_shift;
struct pio chip_select;
struct pio sclk;
struct pio mosi;
struct pio miso;
struct pio_config* pin_cfg_mode_spi;
struct pio_config* pin_cfg_mode_gpio;
};