Merge pull request #8 from ARMmbed/nordic_sdk_9.0.0

Update files to Nordic sdk 9.0.0 - Merging to prepare for v10 PR
master
LIYOU ZHOU 7 years ago
commit 164b319592

@ -1,5 +1,5 @@
# nrf51-sdk
Module to contain files provided by the nordic nRF51 SDK. The latest version of this module uses files from Nordic SDK 8.1.0. The files are extracted from [here] (https://developer.nordicsemi.com/nRF51_SDK/nRF51_SDK_v8.x.x/nRF51_SDK_8.1.0_b6ed55f.zip).
Module to contain files provided by the nordic nRF51 SDK. The latest version of this module uses files from Nordic SDK 9.0.0. The files are extracted from [here](https://developer.nordicsemi.com/nRF51_SDK/nRF51_SDK_v9.x.x/nRF51_SDK_9.0.0_2e23562.zip).
## Changes made to Nordic files
The files are kept the same as much as possible to the Nordic SDK. Modifications are made in order to integrate with mbed.

@ -38,7 +38,6 @@
"source/nordic_sdk/components/libraries/hci",
"source/nordic_sdk/components/libraries/scheduler",
"source/nordic_sdk/components/libraries/timer",
"source/nordic_sdk/components/libraries/trace",
"source/nordic_sdk/components/libraries/util",
"source/nordic_sdk/components/softdevice/common/softdevice_handler",
"source/nordic_sdk/components/softdevice/s130/headers",

@ -10,7 +10,7 @@ options: --purge : to delete all existing files and start again
""".format(os.path.basename(__file__))
# exclude path to avoid confusion over files of the same name
exclude_path = ["examples", "SVD", "s110", "s120", "s210", "nrf_soc_nosd", "serialization/connectivity",
exclude_path = ["examples", "SVD", "s110", "s120", "s210", "s310", "nrf_soc_nosd", "serialization/connectivity",
'components/libraries/hci/config', 'components/libraries/bootloader_dfu/ble_transport']
def find(name, path):

@ -111,8 +111,8 @@ typedef enum
*/
typedef struct
{
uint8_t len; /**< Length of the packet received. */
uint8_t * p_data; /**< Pointer to the received packet. This will point to a word aligned memory location.*/
uint8_t len; /**< Length of the packet received. */
} ble_dfu_pkt_write_t;
/**@brief Packet receipt notification request structure.

@ -349,6 +349,7 @@ void ble_conn_params_on_ble_evt(ble_evt_t * p_ble_evt)
}
}
uint32_t ble_conn_params_change_conn_params(ble_gap_conn_params_t * new_params)
{
uint32_t err_code;

@ -30,8 +30,8 @@
*
*/
/* Attention!
* To maintain compliance with Nordic Semiconductor ASAs Bluetooth profile
/* Attention!
* To maintain compliance with Nordic Semiconductor ASAs Bluetooth profile
* qualification listings, this section of source code must not be modified.
*/
@ -39,7 +39,7 @@
#include <string.h>
#include "nordic_common.h"
#include "app_error.h"
#include "ble.h"
uint8_t ble_srv_report_ref_encode(uint8_t * p_encoded_buffer,
const ble_srv_report_ref_t * p_report_ref)
@ -59,3 +59,99 @@ void ble_srv_ascii_to_utf8(ble_srv_utf8_str_t * p_utf8, char * p_ascii)
p_utf8->length = (uint16_t)strlen(p_ascii);
p_utf8->p_str = (uint8_t *)p_ascii;
}
/**@brief Function for setting security requirements of a characteristic.
*
* @param[in] level required security level.
*
* @return encoded security level and security mode.
*/
static inline ble_gap_conn_sec_mode_t set_security_req(security_req_t level)
{
ble_gap_conn_sec_mode_t perm;
BLE_GAP_CONN_SEC_MODE_SET_NO_ACCESS(&perm);
switch (level)
{
case SEC_NO_ACCESS:
BLE_GAP_CONN_SEC_MODE_SET_NO_ACCESS(&perm);
break;
case SEC_OPEN:
BLE_GAP_CONN_SEC_MODE_SET_OPEN(&perm);
break;
case SEC_JUST_WORKS:
BLE_GAP_CONN_SEC_MODE_SET_ENC_NO_MITM(&perm);
break;
case SEC_MITM:
BLE_GAP_CONN_SEC_MODE_SET_ENC_WITH_MITM(&perm);
break;
case SEC_SIGNED:
BLE_GAP_CONN_SEC_MODE_SET_SIGNED_NO_MITM(&perm);
break;
case SEC_SIGNED_MITM:
BLE_GAP_CONN_SEC_MODE_SET_SIGNED_WITH_MITM(&perm);
break;
}
return(perm);
}
uint32_t characteristic_add(uint16_t service_handle,
ble_add_char_params_t * p_char_props,
ble_gatts_char_handles_t * p_char_handle)
{
ble_gatts_char_md_t char_md;
ble_gatts_attr_t attr_char_value;
ble_uuid_t char_uuid;
ble_gatts_attr_md_t attr_md;
if (p_char_props->uuid_type == 0)
{
char_uuid.type = BLE_UUID_TYPE_BLE;
}
else
{
char_uuid.type = p_char_props->uuid_type;
}
char_uuid.uuid = p_char_props->uuid;
memset(&attr_md, 0, sizeof(attr_md));
attr_md.read_perm = set_security_req(p_char_props->read_access);
attr_md.write_perm = set_security_req(p_char_props->write_access);
attr_md.rd_auth = (p_char_props->is_defered_read ? 1 : 0);
attr_md.wr_auth = (p_char_props->is_defered_write ? 1 : 0);
attr_md.vlen = (p_char_props->is_var_len ? 1 : 0);
attr_md.vloc = (p_char_props->is_value_local ? BLE_GATTS_VLOC_USER : BLE_GATTS_VLOC_STACK);
memset(&char_md, 0, sizeof(char_md));
if ((p_char_props->char_props.notify == 1)||(p_char_props->char_props.indicate == 1))
{
ble_gatts_attr_md_t cccd_md;
memset(&cccd_md, 0, sizeof(cccd_md));
cccd_md.write_perm = set_security_req(p_char_props->cccd_write_access);
BLE_GAP_CONN_SEC_MODE_SET_OPEN(&cccd_md.read_perm);
cccd_md.vloc = BLE_GATTS_VLOC_STACK;
char_md.p_cccd_md = &cccd_md;
}
char_md.char_props = p_char_props->char_props;
memset(&attr_char_value, 0, sizeof(attr_char_value));
attr_char_value.p_uuid = &char_uuid;
attr_char_value.p_attr_md = &attr_md;
attr_char_value.max_len = p_char_props->max_len;
if (p_char_props->p_init_value != NULL)
{
attr_char_value.init_len = p_char_props->init_len;
attr_char_value.p_value = p_char_props->p_init_value;
}
return sd_ble_gatts_characteristic_add(service_handle,
&char_md,
&attr_char_value,
p_char_handle);
}

@ -35,7 +35,7 @@
* @defgroup ble_sdk_srv_common Common service definitions
* @{
* @ingroup ble_sdk_srv
* @brief Constants, type definitions and functions that are common to all services.
* @brief Constants, type definitions, and functions that are common to all services.
*/
#ifndef BLE_SRV_COMMON_H__
@ -45,6 +45,7 @@
#include <stdbool.h>
#include "ble_types.h"
#include "app_util.h"
#include "ble.h"
#include "ble_gap.h"
#include "ble_gatt.h"
@ -68,8 +69,6 @@
#define BLE_UUID_RUNNING_SPEED_AND_CADENCE 0x1814 /**< Running Speed and Cadence service UUID. */
#define BLE_UUID_SCAN_PARAMETERS_SERVICE 0x1813 /**< Scan Parameters service UUID. */
#define BLE_UUID_TX_POWER_SERVICE 0x1804 /**< TX Power service UUID. */
#define BLE_UUID_IPSP_SERVICE 0x1820 /**< Internet Protocol Support service UUID. */
/** @} */
/** @defgroup UUID_CHARACTERISTICS Characteristic UUID definitions
@ -158,19 +157,20 @@
#define BLE_SRV_ENCODED_REPORT_REF_LEN 2 /**< The length of an encoded Report Reference Descriptor. */
#define BLE_CCCD_VALUE_LEN 2 /**< The length of a CCCD value. */
/**@brief Type definition for error handler function which will be called in case of an error in
/**@brief Type definition for error handler function that will be called in case of an error in
* a service or a service library module. */
typedef void (*ble_srv_error_handler_t) (uint32_t nrf_error);
/**@brief Value of a Report Reference descriptor.
*
* @details This is mapping information which maps the parent characteristic to the Report ID(s) and
* @details This is mapping information that maps the parent characteristic to the Report ID(s) and
* Report Type(s) defined within a Report Map characteristic.
*/
typedef struct
{
uint8_t report_id; /**< Non-zero value if these is more than one instance of the same Report Type */
uint8_t report_type; /**< Type of Report characteristic @if (SD_S110) (see @ref BLE_HIDS_REPORT_TYPE) @endif */
uint8_t report_id; /**< Non-zero value if there is more than one instance of the same Report Type */
uint8_t report_type; /**< Type of Report characteristic (see @ref BLE_HIDS_REPORT_TYPE) */
} ble_srv_report_ref_t;
/**@brief UTF-8 string data type.
@ -183,6 +183,7 @@ typedef struct
uint8_t * p_str; /**< String data. */
} ble_srv_utf8_str_t;
/**@brief Security settings structure.
* @details This structure contains the security options needed during initialization of the
* service.
@ -195,11 +196,11 @@ typedef struct
/**@brief Security settings structure.
* @details This structure contains the security options needed during initialization of the
* service. It can be used when the charecteristics contains cccd.
* service. It can be used when the characteristics contains cccd.
*/
typedef struct
{
ble_gap_conn_sec_mode_t cccd_write_perm;
ble_gap_conn_sec_mode_t cccd_write_perm; /**< Write permissions for Client Characteristic Configuration Descriptor. */
ble_gap_conn_sec_mode_t read_perm; /**< Read permissions. */
ble_gap_conn_sec_mode_t write_perm; /**< Write permissions. */
} ble_srv_cccd_security_mode_t;
@ -209,7 +210,8 @@ typedef struct
*
* @param[in] p_encoded_data Buffer where the encoded CCCD is stored.
*
* @return TRUE if notification is enabled, FALSE otherwise.
* @retval TRUE If notification is enabled.
* @retval FALSE Otherwise.
*/
static __INLINE bool ble_srv_is_notification_enabled(uint8_t * p_encoded_data)
{
@ -222,7 +224,8 @@ static __INLINE bool ble_srv_is_notification_enabled(uint8_t * p_encoded_data)
*
* @param[in] p_encoded_data Buffer where the encoded CCCD is stored.
*
* @return TRUE if indication is enabled, FALSE otherwise.
* @retval TRUE If indication is enabled.
* @retval FALSE Otherwise.
*/
static __INLINE bool ble_srv_is_indication_enabled(uint8_t * p_encoded_data)
{
@ -240,13 +243,65 @@ static __INLINE bool ble_srv_is_indication_enabled(uint8_t * p_encoded_data)
uint8_t ble_srv_report_ref_encode(uint8_t * p_encoded_buffer,
const ble_srv_report_ref_t * p_report_ref);
/**@brief Function for making UTF-8 structure refer to an ASCII string.
/**@brief Function for making a UTF-8 structure refer to an ASCII string.
*
* @param[out] p_utf8 UTF-8 structure to be set.
* @param[in] p_ascii ASCII string to be referred to.
*/
void ble_srv_ascii_to_utf8(ble_srv_utf8_str_t * p_utf8, char * p_ascii);
/**@brief Security Access enumeration.
* @details This enumeration gives the possible requirements for accessing a characteristic value.
*/
typedef enum
{
SEC_NO_ACCESS = 0, /**< Not possible to access. */
SEC_OPEN = 1, /**< Access open. */
SEC_JUST_WORKS = 2, /**< Access possible with 'Just Works' security at least. */
SEC_MITM = 3, /**< Access possible with 'MITM' security at least. */
SEC_SIGNED = 4, /**< Access possible with 'signed' security at least. */
SEC_SIGNED_MITM = 5 /**< Access possible with 'signed and MITM' security at least. */
}security_req_t;
/**@brief Add characteristic parameters structure.
* @details This structure contains the parameters needed to use the @ref characteristic_add function.
*/
typedef struct
{
uint16_t uuid; /**< Characteristic UUID (16 bits UUIDs).*/
uint8_t uuid_type; /**< Base UUID. If 0, the Bluetooth SIG UUID will be used. Otherwise, this should be a value returned by @ref sd_ble_uuid_vs_add when adding the base UUID.*/
uint16_t max_len; /**< Maximum length of the characteristic value.*/
uint16_t init_len; /**< Initial length of the characteristic value.*/
uint8_t * p_init_value; /**< Initial encoded value of the characteristic.*/
bool is_var_len; /**< Indicates if the characteristic value has variable length.*/
ble_gatt_char_props_t char_props; /**< Characteristic properties.*/
bool is_defered_read; /**< Indicate if deferred read operations are supported.*/
bool is_defered_write; /**< Indicate if deferred write operations are supported.*/
security_req_t read_access; /**< Security requirement for reading the characteristic value.*/
security_req_t write_access; /**< Security requirement for writing the characteristic value.*/
security_req_t cccd_write_access; /**< Security requirement for writing the characteristic's CCCD.*/
bool is_value_local; /**< Indicate if the content of the characteristic is to be stored locally or in the stack.*/
} ble_add_char_params_t;
/**@brief Function for adding a characteristic to a given service.
*
* If no pointer is given for the initial value,
* the initial length parameter will be ignored and the initial length will be 0.
*
* @param[in] service_handle Handle of the service to which the characteristic is to be added.
* @param[in] p_char_props Information needed to add the characteristic.
* @param[out] p_char_handle Handle of the added characteristic.
*
* @retval NRF_SUCCESS If the characteristic was added successfully. Otherwise, an error code is returned.
*/
uint32_t characteristic_add(uint16_t service_handle,
ble_add_char_params_t * p_char_props,
ble_gatts_char_handles_t * p_char_handle);
#endif // BLE_SRV_COMMON_H__
/** @} */

@ -46,9 +46,13 @@
#include "nrf51.h"
#include "nrf51_bitfields.h"
#include "nrf51_deprecated.h"
#elif defined (NRF52)
#include "nrf52.h"
#include "nrf52_bitfields.h"
#include "nrf51_to_nrf52.h"
#else
#error "Device family must be defined. See nrf.h."
#endif /* NRF51 */
#endif /* NRF51, NRF52 */
#include "compiler_abstraction.h"

@ -28,8 +28,8 @@
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
*/
#ifndef NRF51_H
#define NRF51_H
@ -270,27 +270,6 @@ typedef struct { /*!< MPU Structure
} NRF_MPU_Type;
/* ================================================================================ */
/* ================ PU ================ */
/* ================================================================================ */
/**
* @brief Patch unit. (PU)
*/
typedef struct { /*!< PU Structure */
__I uint32_t RESERVED0[448];
__IO uint32_t REPLACEADDR[8]; /*!< Address of first instruction to replace. */
__I uint32_t RESERVED1[24];
__IO uint32_t PATCHADDR[8]; /*!< Relative address of patch instructions. */
__I uint32_t RESERVED2[24];
__IO uint32_t PATCHEN; /*!< Patch enable register. */
__IO uint32_t PATCHENSET; /*!< Patch enable register. */
__IO uint32_t PATCHENCLR; /*!< Patch disable register. */
} NRF_PU_Type;
/* ================================================================================ */
/* ================ AMLI ================ */
/* ================================================================================ */
@ -344,11 +323,11 @@ typedef struct { /*!< RADIO Structure
__IO uint32_t INTENCLR; /*!< Interrupt enable clear register. */
__I uint32_t RESERVED4[61];
__I uint32_t CRCSTATUS; /*!< CRC status of received packet. */
__I uint32_t CD; /*!< Carrier detect. */
__I uint32_t RESERVED5;
__I uint32_t RXMATCH; /*!< Received address. */
__I uint32_t RXCRC; /*!< Received CRC. */
__I uint32_t DAI; /*!< Device address match index. */
__I uint32_t RESERVED5[60];
__I uint32_t RESERVED6[60];
__IO uint32_t PACKETPTR; /*!< Packet pointer. Decision point: START task. */
__IO uint32_t FREQUENCY; /*!< Frequency. */
__IO uint32_t TXPOWER; /*!< Output power. */
@ -367,22 +346,22 @@ typedef struct { /*!< RADIO Structure
__IO uint32_t TEST; /*!< Test features enable register. */
__IO uint32_t TIFS; /*!< Inter Frame Spacing in microseconds. */
__I uint32_t RSSISAMPLE; /*!< RSSI sample. */
__I uint32_t RESERVED6;
__I uint32_t RESERVED7;
__I uint32_t STATE; /*!< Current radio state. */
__IO uint32_t DATAWHITEIV; /*!< Data whitening initial value. */
__I uint32_t RESERVED7[2];
__I uint32_t RESERVED8[2];
__IO uint32_t BCC; /*!< Bit counter compare. */
__I uint32_t RESERVED8[39];
__I uint32_t RESERVED9[39];
__IO uint32_t DAB[8]; /*!< Device address base segment. */
__IO uint32_t DAP[8]; /*!< Device address prefix. */
__IO uint32_t DACNF; /*!< Device address match configuration. */
__I uint32_t RESERVED9[56];
__I uint32_t RESERVED10[56];
__IO uint32_t OVERRIDE0; /*!< Trim value override register 0. */
__IO uint32_t OVERRIDE1; /*!< Trim value override register 1. */
__IO uint32_t OVERRIDE2; /*!< Trim value override register 2. */
__IO uint32_t OVERRIDE3; /*!< Trim value override register 3. */
__IO uint32_t OVERRIDE4; /*!< Trim value override register 4. */
__I uint32_t RESERVED10[561];
__I uint32_t RESERVED11[561];
__IO uint32_t POWER; /*!< Peripheral power control. */
} NRF_RADIO_Type;
@ -413,14 +392,16 @@ typedef struct { /*!< UART Structure
__IO uint32_t EVENTS_ERROR; /*!< Error detected. */
__I uint32_t RESERVED4[7];
__IO uint32_t EVENTS_RXTO; /*!< Receiver timeout. */
__I uint32_t RESERVED5[111];
__I uint32_t RESERVED5[46];
__IO uint32_t SHORTS; /*!< Shortcuts for UART. */
__I uint32_t RESERVED6[64];
__IO uint32_t INTENSET; /*!< Interrupt enable set register. */
__IO uint32_t INTENCLR; /*!< Interrupt enable clear register. */
__I uint32_t RESERVED6[93];
__I uint32_t RESERVED7[93];
__IO uint32_t ERRORSRC; /*!< Error source. Write error field to 1 to clear error. */
__I uint32_t RESERVED7[31];
__I uint32_t RESERVED8[31];
__IO uint32_t ENABLE; /*!< Enable UART and acquire IOs. */
__I uint32_t RESERVED8;
__I uint32_t RESERVED9;
__IO uint32_t PSELRTS; /*!< Pin select for RTS. */
__IO uint32_t PSELTXD; /*!< Pin select for TXD. */
__IO uint32_t PSELCTS; /*!< Pin select for CTS. */
@ -429,11 +410,11 @@ typedef struct { /*!< UART Structure
Once read the character is consumed. If read when no character
available, the UART will stop working. */
__O uint32_t TXD; /*!< TXD register. */
__I uint32_t RESERVED9;
__I uint32_t RESERVED10;
__IO uint32_t BAUDRATE; /*!< UART Baudrate. */
__I uint32_t RESERVED10[17];
__I uint32_t RESERVED11[17];
__IO uint32_t CONFIG; /*!< Configuration of parity and hardware flow control register. */
__I uint32_t RESERVED11[675];
__I uint32_t RESERVED12[675];
__IO uint32_t POWER; /*!< Peripheral power control. */
} NRF_UART_Type;
@ -596,32 +577,28 @@ typedef struct { /*!< SPIM Structure
__IO uint32_t EVENTS_STOPPED; /*!< SPI transaction has stopped. */
__I uint32_t RESERVED3[2];
__IO uint32_t EVENTS_ENDRX; /*!< End of RXD buffer reached. */
__I uint32_t RESERVED4;
__IO uint32_t EVENTS_END; /*!< End of RXD buffer and TXD buffer reached. */
__I uint32_t RESERVED5;
__I uint32_t RESERVED4[3];
__IO uint32_t EVENTS_ENDTX; /*!< End of TXD buffer reached. */
__I uint32_t RESERVED6[10];
__I uint32_t RESERVED5[10];
__IO uint32_t EVENTS_STARTED; /*!< Transaction started. */
__I uint32_t RESERVED7[44];
__IO uint32_t SHORTS; /*!< Shortcuts for SPIM. */
__I uint32_t RESERVED8[64];
__I uint32_t RESERVED6[109];
__IO uint32_t INTENSET; /*!< Interrupt enable set register. */
__IO uint32_t INTENCLR; /*!< Interrupt enable clear register. */
__I uint32_t RESERVED9[125];
__I uint32_t RESERVED7[125];
__IO uint32_t ENABLE; /*!< Enable SPIM. */
__I uint32_t RESERVED10;
__I uint32_t RESERVED8;
SPIM_PSEL_Type PSEL; /*!< Pin select configuration. */
__I uint32_t RESERVED11[4];
__I uint32_t RESERVED9[4];
__IO uint32_t FREQUENCY; /*!< SPI frequency. */
__I uint32_t RESERVED12[3];
__I uint32_t RESERVED10[3];
SPIM_RXD_Type RXD; /*!< RXD EasyDMA configuration and status. */
__I uint32_t RESERVED13;
__I uint32_t RESERVED11;
SPIM_TXD_Type TXD; /*!< TXD EasyDMA configuration and status. */
__I uint32_t RESERVED14;
__I uint32_t RESERVED12;
__IO uint32_t CONFIG; /*!< Configuration register. */
__I uint32_t RESERVED15[26];
__I uint32_t RESERVED13[26];
__IO uint32_t ORC; /*!< Over-read character. */
__I uint32_t RESERVED16[654];
__I uint32_t RESERVED14[654];
__IO uint32_t POWER; /*!< Peripheral power control. */
} NRF_SPIM_Type;
@ -1200,7 +1177,6 @@ typedef struct { /*!< GPIO Structure
#define NRF_POWER_BASE 0x40000000UL
#define NRF_CLOCK_BASE 0x40000000UL
#define NRF_MPU_BASE 0x40000000UL
#define NRF_PU_BASE 0x40000000UL
#define NRF_AMLI_BASE 0x40000000UL
#define NRF_RADIO_BASE 0x40001000UL
#define NRF_UART0_BASE 0x40002000UL
@ -1240,7 +1216,6 @@ typedef struct { /*!< GPIO Structure
#define NRF_POWER ((NRF_POWER_Type *) NRF_POWER_BASE)
#define NRF_CLOCK ((NRF_CLOCK_Type *) NRF_CLOCK_BASE)
#define NRF_MPU ((NRF_MPU_Type *) NRF_MPU_BASE)
#define NRF_PU ((NRF_PU_Type *) NRF_PU_BASE)
#define NRF_AMLI ((NRF_AMLI_Type *) NRF_AMLI_BASE)
#define NRF_RADIO ((NRF_RADIO_Type *) NRF_RADIO_BASE)
#define NRF_UART0 ((NRF_UART_Type *) NRF_UART0_BASE)

@ -4598,186 +4598,6 @@
#define PPI_CHG_CH0_Included (1UL) /*!< Channel included. */
/* Peripheral: PU */
/* Description: Patch unit. */
/* Register: PU_PATCHADDR */
/* Description: Relative address of patch instructions. */
/* Bits 24..0 : Relative address of patch instructions. */
#define PU_PATCHADDR_PATCHADDR_Pos (0UL) /*!< Position of PATCHADDR field. */
#define PU_PATCHADDR_PATCHADDR_Msk (0x1FFFFFFUL << PU_PATCHADDR_PATCHADDR_Pos) /*!< Bit mask of PATCHADDR field. */
/* Register: PU_PATCHEN */
/* Description: Patch enable register. */
/* Bit 7 : Patch 7 enabled. */
#define PU_PATCHEN_PATCH7_Pos (7UL) /*!< Position of PATCH7 field. */
#define PU_PATCHEN_PATCH7_Msk (0x1UL << PU_PATCHEN_PATCH7_Pos) /*!< Bit mask of PATCH7 field. */
#define PU_PATCHEN_PATCH7_Disabled (0UL) /*!< Patch disabled. */
#define PU_PATCHEN_PATCH7_Enabled (1UL) /*!< Patch enabled. */
/* Bit 6 : Patch 6 enabled. */
#define PU_PATCHEN_PATCH6_Pos (6UL) /*!< Position of PATCH6 field. */
#define PU_PATCHEN_PATCH6_Msk (0x1UL << PU_PATCHEN_PATCH6_Pos) /*!< Bit mask of PATCH6 field. */
#define PU_PATCHEN_PATCH6_Disabled (0UL) /*!< Patch disabled. */
#define PU_PATCHEN_PATCH6_Enabled (1UL) /*!< Patch enabled. */
/* Bit 5 : Patch 5 enabled. */
#define PU_PATCHEN_PATCH5_Pos (5UL) /*!< Position of PATCH5 field. */
#define PU_PATCHEN_PATCH5_Msk (0x1UL << PU_PATCHEN_PATCH5_Pos) /*!< Bit mask of PATCH5 field. */
#define PU_PATCHEN_PATCH5_Disabled (0UL) /*!< Patch disabled. */
#define PU_PATCHEN_PATCH5_Enabled (1UL) /*!< Patch enabled. */
/* Bit 4 : Patch 4 enabled. */
#define PU_PATCHEN_PATCH4_Pos (4UL) /*!< Position of PATCH4 field. */
#define PU_PATCHEN_PATCH4_Msk (0x1UL << PU_PATCHEN_PATCH4_Pos) /*!< Bit mask of PATCH4 field. */
#define PU_PATCHEN_PATCH4_Disabled (0UL) /*!< Patch disabled. */
#define PU_PATCHEN_PATCH4_Enabled (1UL) /*!< Patch enabled. */
/* Bit 3 : Patch 3 enabled. */
#define PU_PATCHEN_PATCH3_Pos (3UL) /*!< Position of PATCH3 field. */
#define PU_PATCHEN_PATCH3_Msk (0x1UL << PU_PATCHEN_PATCH3_Pos) /*!< Bit mask of PATCH3 field. */
#define PU_PATCHEN_PATCH3_Disabled (0UL) /*!< Patch disabled. */
#define PU_PATCHEN_PATCH3_Enabled (1UL) /*!< Patch enabled. */
/* Bit 2 : Patch 2 enabled. */
#define PU_PATCHEN_PATCH2_Pos (2UL) /*!< Position of PATCH2 field. */
#define PU_PATCHEN_PATCH2_Msk (0x1UL << PU_PATCHEN_PATCH2_Pos) /*!< Bit mask of PATCH2 field. */
#define PU_PATCHEN_PATCH2_Disabled (0UL) /*!< Patch disabled. */
#define PU_PATCHEN_PATCH2_Enabled (1UL) /*!< Patch enabled. */
/* Bit 1 : Patch 1 enabled. */
#define PU_PATCHEN_PATCH1_Pos (1UL) /*!< Position of PATCH1 field. */
#define PU_PATCHEN_PATCH1_Msk (0x1UL << PU_PATCHEN_PATCH1_Pos) /*!< Bit mask of PATCH1 field. */
#define PU_PATCHEN_PATCH1_Disabled (0UL) /*!< Patch disabled. */
#define PU_PATCHEN_PATCH1_Enabled (1UL) /*!< Patch enabled. */
/* Bit 0 : Patch 0 enabled. */
#define PU_PATCHEN_PATCH0_Pos (0UL) /*!< Position of PATCH0 field. */
#define PU_PATCHEN_PATCH0_Msk (0x1UL << PU_PATCHEN_PATCH0_Pos) /*!< Bit mask of PATCH0 field. */
#define PU_PATCHEN_PATCH0_Disabled (0UL) /*!< Patch disabled. */
#define PU_PATCHEN_PATCH0_Enabled (1UL) /*!< Patch enabled. */
/* Register: PU_PATCHENSET */
/* Description: Patch enable register. */
/* Bit 7 : Patch 7 enabled. */
#define PU_PATCHENSET_PATCH7_Pos (7UL) /*!< Position of PATCH7 field. */
#define PU_PATCHENSET_PATCH7_Msk (0x1UL << PU_PATCHENSET_PATCH7_Pos) /*!< Bit mask of PATCH7 field. */
#define PU_PATCHENSET_PATCH7_Disabled (0UL) /*!< Patch disabled. */
#define PU_PATCHENSET_PATCH7_Enabled (1UL) /*!< Patch enabled. */
#define PU_PATCHENSET_PATCH7_Set (1UL) /*!< Enable patch on write. */
/* Bit 6 : Patch 6 enabled. */
#define PU_PATCHENSET_PATCH6_Pos (6UL) /*!< Position of PATCH6 field. */
#define PU_PATCHENSET_PATCH6_Msk (0x1UL << PU_PATCHENSET_PATCH6_Pos) /*!< Bit mask of PATCH6 field. */
#define PU_PATCHENSET_PATCH6_Disabled (0UL) /*!< Patch disabled. */
#define PU_PATCHENSET_PATCH6_Enabled (1UL) /*!< Patch enabled. */
#define PU_PATCHENSET_PATCH6_Set (1UL) /*!< Enable patch on write. */
/* Bit 5 : Patch 5 enabled. */
#define PU_PATCHENSET_PATCH5_Pos (5UL) /*!< Position of PATCH5 field. */
#define PU_PATCHENSET_PATCH5_Msk (0x1UL << PU_PATCHENSET_PATCH5_Pos) /*!< Bit mask of PATCH5 field. */
#define PU_PATCHENSET_PATCH5_Disabled (0UL) /*!< Patch disabled. */
#define PU_PATCHENSET_PATCH5_Enabled (1UL) /*!< Patch enabled. */
#define PU_PATCHENSET_PATCH5_Set (1UL) /*!< Enable patch on write. */
/* Bit 4 : Patch 4 enabled. */
#define PU_PATCHENSET_PATCH4_Pos (4UL) /*!< Position of PATCH4 field. */
#define PU_PATCHENSET_PATCH4_Msk (0x1UL << PU_PATCHENSET_PATCH4_Pos) /*!< Bit mask of PATCH4 field. */
#define PU_PATCHENSET_PATCH4_Disabled (0UL) /*!< Patch disabled. */
#define PU_PATCHENSET_PATCH4_Enabled (1UL) /*!< Patch enabled. */
#define PU_PATCHENSET_PATCH4_Set (1UL) /*!< Enable patch on write. */
/* Bit 3 : Patch 3 enabled. */
#define PU_PATCHENSET_PATCH3_Pos (3UL) /*!< Position of PATCH3 field. */
#define PU_PATCHENSET_PATCH3_Msk (0x1UL << PU_PATCHENSET_PATCH3_Pos) /*!< Bit mask of PATCH3 field. */
#define PU_PATCHENSET_PATCH3_Disabled (0UL) /*!< Patch disabled. */
#define PU_PATCHENSET_PATCH3_Enabled (1UL) /*!< Patch enabled. */
#define PU_PATCHENSET_PATCH3_Set (1UL) /*!< Enable patch on write. */
/* Bit 2 : Patch 2 enabled. */
#define PU_PATCHENSET_PATCH2_Pos (2UL) /*!< Position of PATCH2 field. */
#define PU_PATCHENSET_PATCH2_Msk (0x1UL << PU_PATCHENSET_PATCH2_Pos) /*!< Bit mask of PATCH2 field. */
#define PU_PATCHENSET_PATCH2_Disabled (0UL) /*!< Patch disabled. */
#define PU_PATCHENSET_PATCH2_Enabled (1UL) /*!< Patch enabled. */
#define PU_PATCHENSET_PATCH2_Set (1UL) /*!< Enable patch on write. */
/* Bit 1 : Patch 1 enabled. */
#define PU_PATCHENSET_PATCH1_Pos (1UL) /*!< Position of PATCH1 field. */
#define PU_PATCHENSET_PATCH1_Msk (0x1UL << PU_PATCHENSET_PATCH1_Pos) /*!< Bit mask of PATCH1 field. */
#define PU_PATCHENSET_PATCH1_Disabled (0UL) /*!< Patch disabled. */
#define PU_PATCHENSET_PATCH1_Enabled (1UL) /*!< Patch enabled. */
#define PU_PATCHENSET_PATCH1_Set (1UL) /*!< Enable patch on write. */
/* Bit 0 : Patch 0 enabled. */
#define PU_PATCHENSET_PATCH0_Pos (0UL) /*!< Position of PATCH0 field. */
#define PU_PATCHENSET_PATCH0_Msk (0x1UL << PU_PATCHENSET_PATCH0_Pos) /*!< Bit mask of PATCH0 field. */
#define PU_PATCHENSET_PATCH0_Disabled (0UL) /*!< Patch disabled. */
#define PU_PATCHENSET_PATCH0_Enabled (1UL) /*!< Patch enabled. */
#define PU_PATCHENSET_PATCH0_Set (1UL) /*!< Enable patch on write. */
/* Register: PU_PATCHENCLR */
/* Description: Patch disable register. */
/* Bit 7 : Patch 7 enabled. */
#define PU_PATCHENCLR_PATCH7_Pos (7UL) /*!< Position of PATCH7 field. */
#define PU_PATCHENCLR_PATCH7_Msk (0x1UL << PU_PATCHENCLR_PATCH7_Pos) /*!< Bit mask of PATCH7 field. */
#define PU_PATCHENCLR_PATCH7_Disabled (0UL) /*!< Patch disabled. */
#define PU_PATCHENCLR_PATCH7_Enabled (1UL) /*!< Patch enabled. */
#define PU_PATCHENCLR_PATCH7_Clear (1UL) /*!< Disable patch on write. */
/* Bit 6 : Patch 6 enabled. */
#define PU_PATCHENCLR_PATCH6_Pos (6UL) /*!< Position of PATCH6 field. */
#define PU_PATCHENCLR_PATCH6_Msk (0x1UL << PU_PATCHENCLR_PATCH6_Pos) /*!< Bit mask of PATCH6 field. */
#define PU_PATCHENCLR_PATCH6_Disabled (0UL) /*!< Patch disabled. */
#define PU_PATCHENCLR_PATCH6_Enabled (1UL) /*!< Patch enabled. */
#define PU_PATCHENCLR_PATCH6_Clear (1UL) /*!< Disable patch on write. */
/* Bit 5 : Patch 5 enabled. */
#define PU_PATCHENCLR_PATCH5_Pos (5UL) /*!< Position of PATCH5 field. */
#define PU_PATCHENCLR_PATCH5_Msk (0x1UL << PU_PATCHENCLR_PATCH5_Pos) /*!< Bit mask of PATCH5 field. */
#define PU_PATCHENCLR_PATCH5_Disabled (0UL) /*!< Patch disabled. */
#define PU_PATCHENCLR_PATCH5_Enabled (1UL) /*!< Patch enabled. */
#define PU_PATCHENCLR_PATCH5_Clear (1UL) /*!< Disable patch on write. */
/* Bit 4 : Patch 4 enabled. */
#define PU_PATCHENCLR_PATCH4_Pos (4UL) /*!< Position of PATCH4 field. */
#define PU_PATCHENCLR_PATCH4_Msk (0x1UL << PU_PATCHENCLR_PATCH4_Pos) /*!< Bit mask of PATCH4 field. */
#define PU_PATCHENCLR_PATCH4_Disabled (0UL) /*!< Patch disabled. */
#define PU_PATCHENCLR_PATCH4_Enabled (1UL) /*!< Patch enabled. */
#define PU_PATCHENCLR_PATCH4_Clear (1UL) /*!< Disable patch on write. */
/* Bit 3 : Patch 3 enabled. */
#define PU_PATCHENCLR_PATCH3_Pos (3UL) /*!< Position of PATCH3 field. */
#define PU_PATCHENCLR_PATCH3_Msk (0x1UL << PU_PATCHENCLR_PATCH3_Pos) /*!< Bit mask of PATCH3 field. */
#define PU_PATCHENCLR_PATCH3_Disabled (0UL) /*!< Patch disabled. */
#define PU_PATCHENCLR_PATCH3_Enabled (1UL) /*!< Patch enabled. */
#define PU_PATCHENCLR_PATCH3_Clear (1UL) /*!< Disable patch on write. */
/* Bit 2 : Patch 2 enabled. */
#define PU_PATCHENCLR_PATCH2_Pos (2UL) /*!< Position of PATCH2 field. */
#define PU_PATCHENCLR_PATCH2_Msk (0x1UL << PU_PATCHENCLR_PATCH2_Pos) /*!< Bit mask of PATCH2 field. */
#define PU_PATCHENCLR_PATCH2_Disabled (0UL) /*!< Patch disabled. */
#define PU_PATCHENCLR_PATCH2_Enabled (1UL) /*!< Patch enabled. */
#define PU_PATCHENCLR_PATCH2_Clear (1UL) /*!< Disable patch on write. */
/* Bit 1 : Patch 1 enabled. */
#define PU_PATCHENCLR_PATCH1_Pos (1UL) /*!< Position of PATCH1 field. */
#define PU_PATCHENCLR_PATCH1_Msk (0x1UL << PU_PATCHENCLR_PATCH1_Pos) /*!< Bit mask of PATCH1 field. */
#define PU_PATCHENCLR_PATCH1_Disabled (0UL) /*!< Patch disabled. */
#define PU_PATCHENCLR_PATCH1_Enabled (1UL) /*!< Patch enabled. */
#define PU_PATCHENCLR_PATCH1_Clear (1UL) /*!< Disable patch on write. */
/* Bit 0 : Patch 0 enabled. */
#define PU_PATCHENCLR_PATCH0_Pos (0UL) /*!< Position of PATCH0 field. */
#define PU_PATCHENCLR_PATCH0_Msk (0x1UL << PU_PATCHENCLR_PATCH0_Pos) /*!< Bit mask of PATCH0 field. */
#define PU_PATCHENCLR_PATCH0_Disabled (0UL) /*!< Patch disabled. */
#define PU_PATCHENCLR_PATCH0_Enabled (1UL) /*!< Patch enabled. */
#define PU_PATCHENCLR_PATCH0_Clear (1UL) /*!< Disable patch on write. */
/* Peripheral: QDEC */
/* Description: Rotary decoder. */
@ -5134,13 +4954,6 @@
#define RADIO_CRCSTATUS_CRCSTATUS_CRCError (0UL) /*!< Packet received with CRC error. */
#define RADIO_CRCSTATUS_CRCSTATUS_CRCOk (1UL) /*!< Packet received with CRC ok. */
/* Register: RADIO_CD */
/* Description: Carrier detect. */
/* Bit 0 : Carrier detect. */
#define RADIO_CD_CD_Pos (0UL) /*!< Position of CD field. */
#define RADIO_CD_CD_Msk (0x1UL << RADIO_CD_CD_Pos) /*!< Bit mask of CD field. */
/* Register: RADIO_RXMATCH */
/* Description: Received address. */
@ -5962,15 +5775,6 @@
/* Peripheral: SPIM */
/* Description: SPI master with easyDMA 1. */
/* Register: SPIM_SHORTS */
/* Description: Shortcuts for SPIM. */
/* Bit 17 : Shortcut between END event and START task. */
#define SPIM_SHORTS_END_START_Pos (17UL) /*!< Position of END_START field. */
#define SPIM_SHORTS_END_START_Msk (0x1UL << SPIM_SHORTS_END_START_Pos) /*!< Bit mask of END_START field. */
#define SPIM_SHORTS_END_START_Disabled (0UL) /*!< Shortcut disabled. */
#define SPIM_SHORTS_END_START_Enabled (1UL) /*!< Shortcut enabled. */
/* Register: SPIM_INTENSET */
/* Description: Interrupt enable set register. */
@ -5988,13 +5792,6 @@
#define SPIM_INTENSET_ENDTX_Enabled (1UL) /*!< Interrupt enabled. */
#define SPIM_INTENSET_ENDTX_Set (1UL) /*!< Enable interrupt on write. */
/* Bit 6 : Enable interrupt on END event. */
#define SPIM_INTENSET_END_Pos (6UL) /*!< Position of END field. */
#define SPIM_INTENSET_END_Msk (0x1UL << SPIM_INTENSET_END_Pos) /*!< Bit mask of END field. */
#define SPIM_INTENSET_END_Disabled (0UL) /*!< Interrupt disabled. */
#define SPIM_INTENSET_END_Enabled (1UL) /*!< Interrupt enabled. */
#define SPIM_INTENSET_END_Set (1UL) /*!< Enable interrupt on write. */
/* Bit 4 : Enable interrupt on ENDRX event. */
#define SPIM_INTENSET_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */
#define SPIM_INTENSET_ENDRX_Msk (0x1UL << SPIM_INTENSET_ENDRX_Pos) /*!< Bit mask of ENDRX field. */
@ -6026,13 +5823,6 @@
#define SPIM_INTENCLR_ENDTX_Enabled (1UL) /*!< Interrupt enabled. */
#define SPIM_INTENCLR_ENDTX_Clear (1UL) /*!< Disable interrupt on write. */
/* Bit 6 : Disable interrupt on END event. */
#define SPIM_INTENCLR_END_Pos (6UL) /*!< Position of END field. */
#define SPIM_INTENCLR_END_Msk (0x1UL << SPIM_INTENCLR_END_Pos) /*!< Bit mask of END field. */
#define SPIM_INTENCLR_END_Disabled (0UL) /*!< Interrupt disabled. */
#define SPIM_INTENCLR_END_Enabled (1UL) /*!< Interrupt enabled. */
#define SPIM_INTENCLR_END_Clear (1UL) /*!< Disable interrupt on write. */
/* Bit 4 : Disable interrupt on ENDRX event. */
#define SPIM_INTENCLR_ENDRX_Pos (4UL) /*!< Position of ENDRX field. */
#define SPIM_INTENCLR_ENDRX_Msk (0x1UL << SPIM_INTENCLR_ENDRX_Pos) /*!< Bit mask of ENDRX field. */
@ -6677,6 +6467,21 @@
/* Peripheral: UART */
/* Description: Universal Asynchronous Receiver/Transmitter. */
/* Register: UART_SHORTS */
/* Description: Shortcuts for UART. */
/* Bit 4 : Shortcut between NCTS event and STOPRX task. */
#define UART_SHORTS_NCTS_STOPRX_Pos (4UL) /*!< Position of NCTS_STOPRX field. */
#define UART_SHORTS_NCTS_STOPRX_Msk (0x1UL << UART_SHORTS_NCTS_STOPRX_Pos) /*!< Bit mask of NCTS_STOPRX field. */
#define UART_SHORTS_NCTS_STOPRX_Disabled (0UL) /*!< Shortcut disabled. */
#define UART_SHORTS_NCTS_STOPRX_Enabled (1UL) /*!< Shortcut enabled. */
/* Bit 3 : Shortcut between CTS event and STARTRX task. */
#define UART_SHORTS_CTS_STARTRX_Pos (3UL) /*!< Position of CTS_STARTRX field. */
#define UART_SHORTS_CTS_STARTRX_Msk (0x1UL << UART_SHORTS_CTS_STARTRX_Pos) /*!< Bit mask of CTS_STARTRX field. */
#define UART_SHORTS_CTS_STARTRX_Disabled (0UL) /*!< Shortcut disabled. */
#define UART_SHORTS_CTS_STARTRX_Enabled (1UL) /*!< Shortcut enabled. */
/* Register: UART_INTENSET */
/* Description: Interrupt enable set register. */

@ -28,8 +28,7 @@
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
*/
#ifndef NRF_GPIO_H__
#define NRF_GPIO_H__

@ -1,33 +1,33 @@
/*
* Copyright (c) Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this
* list of conditions and the following disclaimer in the documentation and/or
* other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of other
* contributors to this software may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
/*
* Copyright (c) Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this
* list of conditions and the following disclaimer in the documentation and/or
* other materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of other
* contributors to this software may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/** @cond To make doxygen skip this file */
@ -60,16 +60,16 @@ static __INLINE uint32_t pstorage_flash_page_end()
#define PSTORAGE_FLASH_PAGE_END pstorage_flash_page_end()
#define PSTORAGE_MAX_APPLICATIONS 1 /**< Maximum number of applications that can be registered with the module, configurable based on system requirements. */
#define PSTORAGE_NUM_OF_PAGES 1 /**< Number of flash pages allocated for the pstorage module excluding the swap page, configurable based on system requirements. */
#define PSTORAGE_MIN_BLOCK_SIZE 0x0010 /**< Minimum size of block that can be registered with the module. Should be configured based on system requirements, recommendation is not have this value to be at least size of word. */
#define PSTORAGE_DATA_START_ADDR ((PSTORAGE_FLASH_PAGE_END - PSTORAGE_MAX_APPLICATIONS - 1) \
#define PSTORAGE_DATA_START_ADDR ((PSTORAGE_FLASH_PAGE_END - PSTORAGE_NUM_OF_PAGES - 1) \
* PSTORAGE_FLASH_PAGE_SIZE) /**< Start address for persistent data, configurable according to system requirements. */
#define PSTORAGE_DATA_END_ADDR ((PSTORAGE_FLASH_PAGE_END - 1) * PSTORAGE_FLASH_PAGE_SIZE) /**< End address for persistent data, configurable according to system requirements. */
#define PSTORAGE_SWAP_ADDR PSTORAGE_DATA_END_ADDR /**< Top-most page is used as swap area for clear and update. */
#define PSTORAGE_MAX_BLOCK_SIZE PSTORAGE_FLASH_PAGE_SIZE /**< Maximum size of block that can be registered with the module. Should be configured based on system requirements. And should be greater than or equal to the minimum size. */
#define PSTORAGE_CMD_QUEUE_SIZE 2 /**< Maximum number of flash access commands that can be maintained by the module for all applications. Configurable. */
#define PSTORAGE_CMD_QUEUE_SIZE 2 /**< Maximum number of flash access commands that can be maintained by the module for all applications. Configurable. */
/** Abstracts persistently memory block identifier. */

File diff suppressed because it is too large Load Diff

@ -37,9 +37,9 @@
* @ingroup app_common
* @brief Abstracted flash interface.
*
* @details In order to ensure that the SDK and application be moved to alternate persistent storage
* options other than the default provided with NRF solution, an abstracted interface is provided
* by the module to ensure SDK modules and application can be ported to alternate option with ease.
* @details An abstracted interface is provided by the module to easily port the application and
* SDK modules to an alternate option. This ensures that the SDK and application are moved
* to alternate persistent storage instead of the one provided by default.
*/
#ifndef PSTORAGE_H__
@ -50,19 +50,16 @@
/**@defgroup ps_opcode Persistent Storage Access Operation Codes
* @{
* @brief Persistent Storage Access Operation Codes. These are used to report any error during
* a persistent storage access operation or any general error that may occur in the
* interface.
* @brief Persistent Storage Access Operation Codes.
*
* @details Persistent Storage Access Operation Codes used in error notification callback
* registered with the interface to report any error during an persistent storage access
* operation or any general error that may occur in the interface.
* @details Persistent Storage Access Operation Codes are used by Persistent storage operation
* completion callback @ref pstorage_ntf_cb_t to identify the operation type requested by
* the application.
*/
#define PSTORAGE_ERROR_OP_CODE 0x01 /**< General Error Code */
#define PSTORAGE_STORE_OP_CODE 0x02 /**< Error when Store Operation was requested */
#define PSTORAGE_LOAD_OP_CODE 0x03 /**< Error when Load Operation was requested */
#define PSTORAGE_CLEAR_OP_CODE 0x04 /**< Error when Clear Operation was requested */
#define PSTORAGE_UPDATE_OP_CODE 0x05 /**< Update an already touched storage block */
#define PSTORAGE_STORE_OP_CODE 0x01 /**< Store Operation type. */
#define PSTORAGE_LOAD_OP_CODE 0x02 /**< Load Operation type. */
#define PSTORAGE_CLEAR_OP_CODE 0x03 /**< Clear Operation type. */
#define PSTORAGE_UPDATE_OP_CODE 0x04 /**< Update Operation type. */
/**@} */
@ -73,146 +70,148 @@
* @details Data Types needed for interfacing with persistent memory.
*/
/**@brief Persistent Storage Error Reporting Callback
*
* @details Persistent Storage Error Reporting Callback that is used by the interface to report
* success or failure of a flash operation. Therefore, for any operations, application
* can know when the procedure was complete. For store operation, since no data copy
* is made, receiving a success or failure notification, indicated by the reason
* parameter of callback is an indication that the resident memory could now be reused
* or freed, as the case may be.
*
* @param[in] handle Identifies module and block for which callback is received.
* @param[in] op_code Identifies the operation for which the event is notified.
* @param[in] result Identifies the result of flash access operation.
* NRF_SUCCESS implies, operation succeeded.
* @param[in] p_data Identifies the application data pointer. In case of store operation, this
* points to the resident source of application memory that application can now
* free or reuse. In case of clear, this is NULL as no application pointer is
* needed for this operation.
* @param[in] data_len Length data application had provided for the operation.
/**@brief Persistent storage operation completion callback function type.
*
* @details The persistent storage operation completion callback is used by the interface to report
* success or failure of a flash operation. Since data is not copied for a store operation,
* a callback is an indication that the resident memory can now be reused or freed.
*
* @param[in] handle Identifies the module and block for the callback that is received.
* @param[in] op_code Identifies the operation for the event that is notified.
* @param[in] result Identifies the result of a flash access operation. NRF_SUCCESS implies
* operation succeeded.
*
* @note Unmanaged (abnormal behaviour) error codes from the SoftDevice flash
* access API are forwarded as is and are expected to be handled by the
* application. For details refer to the implementation file and corresponding
* SoftDevice flash API documentation.
*
* @param[in] p_data Identifies the application data pointer. For a store operation, this points
* to the resident source of application memory that the application can now
* free or reuse. When there is a clear operation, this is NULL since no
* application pointer is needed for this operation.
* @param[in] data_len Length data the application provided for the operation.
*/
typedef void (*pstorage_ntf_cb_t)(pstorage_handle_t * p_handle,
uint8_t op_code,
uint32_t result,
uint8_t * p_data,
uint32_t data_len);
typedef void (*pstorage_ntf_cb_t)(pstorage_handle_t * p_handle,
uint8_t op_code,
uint32_t result,
uint8_t * p_data,
uint32_t data_len);
/**@brief Struct containing module registration context. */
typedef struct
{
pstorage_ntf_cb_t cb; /**< Callback registered with the module to be notified of any error occurring in persistent memory management */
pstorage_size_t block_size; /**< Desired block size for persistent memory storage, for example, if a module has a table with 10 entries, each entry is size 64 bytes,
* it can request 10 blocks with block size 64 bytes. On the other hand, the module can also request one block of size 640 based on
* how it would like to access or alter memory in persistent memory.
* First option is preferred when single entries that need to be updated often when having no impact on the other entries.
* While second option is preferred when entries of table are not changed on individually but have common point of loading and storing
pstorage_ntf_cb_t cb; /**< Persistent storage operation completion callback function @ref pstorage_ntf_cb_t. */
pstorage_size_t block_size; /**< Desired block size for persistent memory storage. For example, if a module has a table with 10 entries, and each entry is 64 bytes in size,
* it can request 10 blocks with a block size of 64 bytes. The module can also request one block that is 640 bytes depending
* on how it would like to access or alter the memory in persistent memory.
* The first option is preferred when it is a single entry that needs to be updated often and doesn't impact the other entries.
* The second option is preferred when table entries are not changed individually but have a common point of loading and storing
* data. */
pstorage_size_t block_count; /** Number of blocks requested by the module, minimum values is 1. */
pstorage_size_t block_count; /** Number of blocks requested by the module; minimum values is 1. */
} pstorage_module_param_t;
/**@} */
/**@defgroup pstorage_routines Persistent Storage Access Routines
* @{
* @brief Functions/Interface SDK modules use to persistently store data.
* @brief Functions/Interface SDK modules used to persistently store data.
*
* @details Interface for Application & SDK module to load/store information persistently.
* Note: that while implementation of each of the persistent storage access function
* depends on the system and can specific to system/solution, the signature of the
* @details Interface for the Application and SDK modules to load/store information persistently.
* Note: While implementation of each of the persistent storage access functions
* depends on the system and is specific to system/solution, the signature of the
* interface routines should not be altered.
*/
/**@brief Module Initialization Routine.
/**@brief Function for initializing the module.
*
* @details Initializes module. To be called once before any other APIs of the module are used.
* @details Function for initializing the module. This function is called once before any other APIs
* of the module are used.
*
* @retval NRF_SUCCESS on success, else an error code indicating reason for failure.
* @retval NRF_SUCCESS Operation success.
*/
uint32_t pstorage_init(void);
/**@brief Register with persistent storage interface.
/**@brief Function for registering with persistent storage interface.
*
* @param[in] p_module_param Module registration param.
* @param[out] p_block_id Block identifier to identify persistent memory blocks in case
* registration succeeds. Application is expected to use the block ids
* @param[in] p_module_param Module registration parameter.
* @param[out] p_block_id Block identifier to identify persistent memory blocks when
* registration succeeds. Application is expected to use the block IDs
* for subsequent operations on requested persistent memory. Maximum
* registrations permitted is determined by configuration parameter
* PSTORAGE_MAX_APPLICATIONS.
* In case more than one memory blocks are requested, the identifier provided here is
* the base identifier for the first block and to identify subsequent block,
* application shall use \@ref pstorage_block_identifier_get with this base identifier
* and block number. Therefore if 10 blocks of size 64 are requested and application
* wishes to store memory in 6th block, it shall use
* \@ref pstorage_block_identifier_get with based id and provide a block number of 5.
* This way application is only expected to remember the base block identifier.
*
* @note To register an area with a total size (block count * block size) larger than the
* page size (usually 1024 bytes), the block size must be a divisor of the page size
* (page size % block size == 0).
*
* @retval NRF_SUCCESS on success, else an error code indicating reason for failure.
* @retval NRF_ERROR_INVALID_STATE is returned is API is called without module initialization.
* @retval NRF_ERROR_NULL if NULL parameter has been passed.
* @retval NRF_ERROR_INVALID_PARAM if invalid parameters are passed to the API.
* @retval NRF_ERROR_NO_MEM in case no more registrations can be supported.
* registrations permitted is determined by the configuration of the
* parameter PSTORAGE_NUM_OF_PAGES. If more than one memory block is
* requested, the identifier provided here is the base identifier for the
* first block and used to identify the subsequent block. The application
* uses \@ref pstorage_block_identifier_get with this base identifier and
* block number. Therefore if 10 blocks of size 64 are requested and the
* application wishes to store memory in the 6th block, it shall use
* \@ref pstorage_block_identifier_get with the base ID and provide a
* block number of 5. This way the application is only expected to
* remember the base block identifier.
*
* @retval NRF_SUCCESS Operation success.
* @retval NRF_ERROR_INVALID_STATE Operation failure. API is called without module
* initialization.
* @retval NRF_ERROR_NULL Operation failure. NULL parameter has been passed.
* @retval NRF_ERROR_INVALID_PARAM Operation failure. Invalid parameter has been passed.
* @retval NRF_ERROR_NO_MEM Operation failure. Additional registrations can't be
* supported.
*/
uint32_t pstorage_register(pstorage_module_param_t * p_module_param,
pstorage_handle_t * p_block_id);
/**
* @brief Function to get block id with reference to base block identifier provided at time of
* registration.
*
* @details Function to get block id with reference to base block identifier provided at time of
* registration.
* In case more than one memory blocks were requested when registering, the identifier
* provided here is the base identifier for the first block and to identify subsequent
* block, application shall use this routine to get block identifier providing input as
* base identifier and block number. Therefore if 10 blocks of size 64 are requested and
* application wishes to store memory in 6th block, it shall use
* \@ref pstorage_block_identifier_get with based id and provide a block number of 5.
* This way application is only expected to remember the base block identifier.
*
* @param[in] p_base_id Base block id received at the time of registration.
/**@brief Function for getting block ID with reference to base block identifier provided at the time
* of registration.
*
* @details Function to get the block ID with reference to base block identifier provided at the
* time of registration.
* If more than one memory block was requested when registering, the identifier provided
* here is the base identifier for the first block which is used to identify subsequent
* blocks. The application shall use this routine to get the block identifier, providing
* input as base identifier and block number. Therefore, if 10 blocks of size 64 are
* requested and the application wishes to store memory in the 6th block, it shall use
* \@ref pstorage_block_identifier_get with the base ID and provide a block number of 5.
* This way the application is only expected to remember the base block identifier.
*
* @param[in] p_base_id Base block ID received at the time of registration.
* @param[in] block_num Block Number, with first block numbered zero.
* @param[out] p_block_id Block identifier for the block number requested in case the API succeeds.
* @param[out] p_block_id Block identifier for the block number requested when the API succeeds.
*
* @retval NRF_SUCCESS on success, else an error code indicating reason for failure.
* @retval NRF_ERROR_INVALID_STATE is returned is API is called without module initialization.
* @retval NRF_ERROR_NULL if NULL parameter has been passed.
* @retval NRF_ERROR_INVALID_PARAM if invalid parameters are passed to the API.
* @retval NRF_SUCCESS Operation success.
* @retval NRF_ERROR_INVALID_STATE Operation failure. API is called without module
* initialization.
* @retval NRF_ERROR_NULL Operation failure. NULL parameter has been passed.
* @retval NRF_ERROR_INVALID_PARAM Operation failure. Invalid parameter has been passed.
*/
uint32_t pstorage_block_identifier_get(pstorage_handle_t * p_base_id,
pstorage_size_t block_num,
pstorage_handle_t * p_block_id);
/**@brief Routine to persistently store data of length 'size' contained in 'p_src' address
* in storage module at 'p_dest' address; Equivalent to Storage Write.
/**@brief Function for persistently storing data of length 'size' contained in the 'p_src' address
* in the storage module at 'p_dest' address. Equivalent to Storage Write.
*
* @param[in] p_dest Destination address where data is to be stored persistently.
* @param[in] p_src Source address containing data to be stored. API assumes this to be resident
* memory and no intermediate copy of data is made by the API.
* @param[in] size Size of data to be stored expressed in bytes. Should be word aligned.
* memory and no intermediate copy of data is made by the API. Must be word
* aligned.
* @param[in] size Size of data to be stored expressed in bytes. Must be word aligned and size +
* offset must be <= block size.
* @param[in] offset Offset in bytes to be applied when writing to the block.
* For example, if within a block of 100 bytes, application wishes to
* write 20 bytes at offset of 12, then this field should be set to 12.
* Should be word aligned.
* For example, if within a block of 100 bytes, the application wishes to
* write 20 bytes at an offset of 12, then this field should be set to 12.
* Must be word aligned.
*
* @retval NRF_SUCCESS on success, else an error code indicating reason for failure.
* @retval NRF_ERROR_INVALID_STATE is returned is API is called without module initialization.
* @retval NRF_ERROR_NULL if NULL parameter has been passed.
* @retval NRF_ERROR_INVALID_PARAM if invalid parameters are passed to the API.
* @retval NRF_ERROR_INVALID_ADDR in case data address 'p_src' is not aligned.
* @retval NRF_ERROR_NO_MEM in case request cannot be processed.
* @retval NRF_SUCCESS Operation success.
* @retval NRF_ERROR_INVALID_STATE Operation failure. API is called without module
* initialization.
* @retval NRF_ERROR_NULL Operation failure. NULL parameter has been passed.
* @retval NRF_ERROR_INVALID_PARAM Operation failure. Invalid parameter has been passed.
* @retval NRF_ERROR_INVALID_ADDR Operation failure. Parameter is not aligned.
* @retval NRF_ERROR_NO_MEM Operation failure. No storage space available.
*
* @warning No copy of the data is made, and hence memory provided for data source to be written
* to flash cannot be freed or reused by the application until this procedure
* is complete. End of this procedure is notified to the application using the
* @warning No copy of the data is made, meaning memory provided for the data source that is to
* be written to flash cannot be freed or reused by the application until this procedure
* is complete. The application is notified when the procedure is finished using the
* notification callback registered by the application.
*/
uint32_t pstorage_store(pstorage_handle_t * p_dest,
@ -220,28 +219,30 @@ uint32_t pstorage_store(pstorage_handle_t * p_dest,
pstorage_size_t size,
pstorage_size_t offset);
/**@brief Routine to update persistently stored data of length 'size' contained in 'p_src' address
* in storage module at 'p_dest' address.
/**@brief Function for updating persistently stored data of length 'size' contained in the 'p_src'
* address in the storage module at 'p_dest' address.
*
* @param[in] p_dest Destination address where data is to be updated.
* @param[in] p_src Source address containing data to be stored. API assumes this to be resident
* memory and no intermediate copy of data is made by the API.
* @param[in] size Size of data to be stored expressed in bytes. Should be word aligned.
* @param[in] size Size of data to be stored expressed in bytes. Must be word aligned and size +
* offset must be <= block size.
* @param[in] offset Offset in bytes to be applied when writing to the block.
* For example, if within a block of 100 bytes, application wishes to
* write 20 bytes at offset of 12, then this field should be set to 12.
* Should be word aligned.
* For example, if within a block of 100 bytes, the application wishes to
* write 20 bytes at an offset of 12 bytes, then this field should be set to 12.
* Must be word aligned.
*
* @retval NRF_SUCCESS on success, else an error code indicating reason for failure.
* @retval NRF_ERROR_INVALID_STATE is returned is API is called without module initialization.
* @retval NRF_ERROR_NULL if NULL parameter has been passed.
* @retval NRF_ERROR_INVALID_PARAM if invalid parameters are passed to the API.
* @retval NRF_ERROR_INVALID_ADDR in case data address 'p_src' is not aligned.
* @retval NRF_ERROR_NO_MEM in case request cannot be processed.
* @retval NRF_SUCCESS Operation success.
* @retval NRF_ERROR_INVALID_STATE Operation failure. API is called without module
* initialization.
* @retval NRF_ERROR_NULL Operation failure. NULL parameter has been passed.
* @retval NRF_ERROR_INVALID_PARAM Operation failure. Invalid parameter has been passed.
* @retval NRF_ERROR_INVALID_ADDR Operation failure. Parameter is not aligned.
* @retval NRF_ERROR_NO_MEM Operation failure. No storage space available.
*
* @warning No copy of the data is made, and hence memory provided for data source to be written
* to flash cannot be freed or reused by the application until this procedure
* is complete. End of this procedure is notified to the application using the
* @warning No copy of the data is made, meaning memory provided for the data source that is to
* be written to flash cannot be freed or reused by the application until this procedure
* is complete. The application is notified when the procedure is finished using the
* notification callback registered by the application.
*/
uint32_t pstorage_update(pstorage_handle_t * p_dest,
@ -249,68 +250,150 @@ uint32_t pstorage_update(pstorage_handle_t * p_dest,
pstorage_size_t size,
pstorage_size_t offset);
/**@brief Routine to load persistently stored data of length 'size' from 'p_src' address
* to 'p_dest' address; Equivalent to Storage Read.
/**@brief Function for loading persistently stored data of length 'size' from 'p_src' address
* to 'p_dest' address. Equivalent to Storage Read.
*
* @param[in] p_dest Destination address where persistently stored data is to be loaded.
* @param[in] p_src Source from where data is to be loaded from persistent memory.
* @param[in] p_src Source where data is loaded from persistent memory.
* @param[in] size Size of data to be loaded from persistent memory expressed in bytes.
* Should be word aligned.
* @param[in] offset Offset in bytes to be applied when loading from the block.
* For example, if within a block of 100 bytes, application wishes to
* load 20 bytes from offset of 12, then this field should be set to 12.
* @param[in] offset Offset in bytes, to be applied when loading from the block.
* For example, if within a block of 100 bytes, the application wishes to
* load 20 bytes from offset of 12 bytes, then this field should be set to 12.
* Should be word aligned.
*
* @retval NRF_SUCCESS on success, else an error code indicating reason for failure.
* @retval NRF_ERROR_INVALID_STATE is returned is API is called without module initialization.
* @retval NRF_ERROR_NULL if NULL parameter has been passed.
* @retval NRF_ERROR_INVALID_PARAM if invalid parameters are passed to the API.
* @retval NRF_ERROR_INVALID_ADDR in case data address 'p_dst' is not aligned.
* @retval NRF_ERROR_NO_MEM in case request cannot be processed.
* @retval NRF_SUCCESS Operation success.
* @retval NRF_ERROR_INVALID_STATE Operation failure. API is called without module
* initialization.
* @retval NRF_ERROR_NULL Operation failure. NULL parameter has been passed.
* @retval NRF_ERROR_INVALID_PARAM Operation failure. Invalid parameter has been passed.
* @retval NRF_ERROR_INVALID_ADDR Operation failure. Parameter is not aligned.
* @retval NRF_ERROR_NO_MEM Operation failure. No storage space available.
*/
uint32_t pstorage_load(uint8_t * p_dest,
pstorage_handle_t * p_src,
pstorage_size_t size,
pstorage_size_t offset);
/**@brief Routine to clear data in persistent memory.
*
* @param[in] p_base_id Base block identifier in persistent memory that needs to cleared;
* Equivalent to an Erase Operation.
/**@brief Function for clearing data in persistent memory.
*
* @param[in] p_base_id Base block identifier in persistent memory that needs to be cleared;
* equivalent to an Erase Operation.
* @param[in] size Size of data to be cleared from persistent memory expressed in bytes.
* This parameter is to provision for clearing of certain blocks
* of memory, or all memory blocks in a registered module. If the total size
* of the application module is used (blocks * block size) in<