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Fix assembly sequence to start bootloader in GCC

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The assemble sequence within an mbedOS application that starts the nordic
bootloader was being modified by the compiler. The result is that DFU enabled
applications could never start the bootloader correctly. This is because the
GCC compiler was translating a MOV instruction into a ADDS, which sets the
conditional flags in APSR before a conditional branch was executed. The result
of the incorrect branch caused the program to believe that it was in interrupt
mode when this was not the case.
This commit is contained in:
Andres Amaya Garcia 2015-11-12 16:40:47 +00:00
parent 1b42c27110
commit 90f6c9714f
1 changed files with 1 additions and 1 deletions
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2
source/nordic-sdk/components/libraries/bootloader_dfu/bootloader_util_arm.c
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@ -100,8 +100,8 @@ static void bootloader_util_reset(uint32_t start_addr)
"LDR r2, =MASK_ZEROS\n\t" /* Load zeros to R2 */
"MRS r3, IPSR \n\t" /* Load IPSR to R3 to check for handler or thread mode */
"CMP r2, r3 \n\t" /* Compare, if 0 then we are in thread mode and can continue to reset handler of bootloader */
"MOV R0, R6 \n\t"
"CMP r2, r3 \n\t" /* Compare, if 0 then we are in thread mode and can continue to reset handler of bootloader */
"BNE isr_abort \n\t" /* If not zero we need to exit current ISR and jump to reset handler of bootloader */
"LDR r4, =MASK_ONES \n\t" /* Load ones to R4 to be placed in Link Register. */